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[FRESH GRAD ONLY - SEPT 2026 INTAKE] Engineer, Memory Test Development Engineering

CAES

CAES
Job Type   /   Job Level
Full-time   /   Fresh/Entry Level
Company Location
Batu Kawan, Malaysia

ESSENTIAL DUTIES AND RESPONSIBILITIES:

  • 3D NAND test solution design, assessment, development, and maintenance, including hardware, software, and data analysis.
  • R&D and MP program development on multiple platforms including Advantest T5773, T5831 series, & In house designed platforms.
  • Test Equipment bring-up and correlation for new packages, including DSA design, pin & channel mapping.
  • Product-specific flow creation and integration to meet HVM requirements.
  • R&D activities from pre-silicon to post-silicon, including Design Validation, Engineering Evaluation, Qualification Support, and Failure Analysis.
  • Engineering investigation and resolution on design/process/packaging issues. 
  • RMA failure mode analysis and screen coverage improvements.
  • Test data correlation between platforms. Yield enhancement and test time optimization.
  • Collaboration internally across multiple departments, such as PE, Device, Packaging, and Design, as well as with external ATE vendors and related parties for debugging and related engineering activities.
  • In-house designed platform and new test equipment validation, production environment setup.
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