Dice is the leading career destination for tech experts at every stage of their careers. Our client, Reveille Technologies, is seeking the following. Apply via Dice today!
No Contract Only Fulltime
Title: Design Verification Engineer
Loc: Santa Clara CA(Weekly 5 days onsite)
Type: Fulltime
Key Responsibilities:
DV Engineer with strong expertise in SystemVerilog, UVM, and AMBA protocols.
Experienced in building IP/SoC testbenches, writing test plans from design specs, and closing functional/code coverage.
Skilled in power-aware (UPF/CPF) simulations, debugging RTL failures, and collaborating across DFT, PD, and post-silicon teams to ensure high-quality design delivery.
Note: Only local candidate's are eligible to apply for this role.
Praveenkumar
