Chip Implementation EDA Flow Development Engineer
Locations: Albany (NY), Santa Clara (CA), Tokyo (Japan), or Chitose (Japan)
Salary: ¥5,000,000–¥15,000,000 (Overseas assignment allowance provided separately)
We are a leading innovator in semiconductor design and manufacturing, committed to developing cutting-edge EDA (Electronic Design Automation) flows that enable fast, efficient, and high-quality chip development. We are currently seeking a highly skilled Chip Implementation EDA Flow Development Engineer to help elevate our design efficiency and overall productivity.
In this key role, you will work across the entire chip implementation flow - from creating sign-off methodologies for advanced technology nodes to developing CAD infrastructure and designing EDA solutions that address complex technical challenges.
You will collaborate closely with our design teams and leverage state-of-the-art EDA tools and methodologies to accelerate product development.
■ Key Responsibilities:
Chip Implementation EDA Flow Enablement
- Sign-off Flow Development:
- Develop and optimize sign-off flows for RC extraction, timing analysis, and timing fixing to ensure chip performance and reliability.
- EDA Platform Development:
- Build and maintain CAD/EDA platforms for integrating design stages, managing design kits, and handling design databases to enable efficient designer workflows.
- General CAD/EDA Tool Development:
- Develop and enhance EDA tools to address a wide range of design issues, improving overall flow efficiency and eliminating bottlenecks.
Cross-functional Collaboration
- Work with design teams to identify flow and tool requirements.
- Collaborate with EDA vendors to introduce new features and optimize tool performance.
- Support design teams in deploying flows and tools, including troubleshooting and user assistance.
Technology Research & Documentation
- Stay up-to-date with the latest EDA technologies and assess their applicability.
- Create and maintain documentation for developed flows, tools, and methodologies.
■ Required Skills & Experience:
- Bachelor’s degree or higher in Electrical Engineering, Electronics Engineering, Computer Science, or related fields.
- 5+ years of hands-on experience in chip implementation (logic synthesis, place & route, timing closure) for digital IC design.
- Practical experience in EDA flow and/or tool development.
- Strong understanding of RC extraction, timing analysis, and physical verification.
- Experience developing automated flows using scripting languages (Perl, Python, Tcl).
- Proficiency and knowledge of major EDA tools and their internal structures (e.g., Synopsys Fusion Compiler, PrimeTime; Cadence Innovus, Tempus; Siemens EDA Calibre).
- Strong problem-solving and logical reasoning skills.
- Ability to manage multiple projects simultaneously.
- English communication skills.
■ Preferred Skills & Experience:
- Experience with advanced CMOS technology nodes (7nm, 5nm, 3nm).
- Experience developing or operating design database management (DBM) systems.
- Strong understanding of process technology and design rules.
- Experience in QA or verification flow development.
- Experience applying machine learning or data science techniques to EDA flows.
- Team leadership or project management experience.
■ Desired Personality Traits:
- Proactive, self-driven, and eager to innovate and solve new technical challenges.
- Strong analytical and logical thinking abilities.
- Excellent collaboration and stakeholder communication skills (design teams, EDA vendors, etc.).
- Detail-oriented, with a commitment to high-quality deliverables.
- Flexible and continuously eager to learn and adapt in a rapidly evolving technology environment.
